patch-1.3.48 linux/include/asm-mips/cachectl.h
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- Lines: 35
- Date:
Wed Dec 13 12:39:45 1995
- Orig file:
v1.3.47/linux/include/asm-mips/cachectl.h
- Orig date:
Fri Jan 13 20:28:54 1995
diff -u --recursive --new-file v1.3.47/linux/include/asm-mips/cachectl.h linux/include/asm-mips/cachectl.h
@@ -3,8 +3,6 @@
*
* Written by Ralf Baechle,
* Copyright (C) 1994 by Waldorf GMBH
- *
- * Defines for Risc/OS compatible cacheflush systemcall
*/
#ifndef __ASM_MIPS_CACHECTL
#define __ASM_MIPS_CACHECTL
@@ -20,13 +18,20 @@
#define DCACHE (1<<1) /* writeback and flush data cache */
#define BCACHE (ICACHE|DCACHE) /* flush both caches */
-#define CACHELINES 512 /* number of cachelines */
-
#ifdef __KERNEL__
-#ifndef __ASSEMBLY__
+#define CACHELINES 512 /* number of cachelines (kludgy) */
+
+/*
+ * Cache Operations - for use by assembler code
+ */
+#define Index_Invalidate_I 0x00
+#define Index_Writeback_Inv_D 0x01
+#define Index_Load_Tag_D 0x05
+
+#ifndef __LANGUAGE_ASSEMBLY__
extern int sys_cacheflush(void *addr, int nbytes, int cache);
-#endif
-#endif
+#endif /* !__LANGUAGE_ASSEMBLY__ */
+#endif /* __KERNEL__ */
#endif /* __ASM_MIPS_CACHECTL */
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TCL-scripts by Sam Shen, slshen@lbl.gov
with Sam's (original) version of this