patch-2.1.132 linux/arch/arm/mm/mm-ebsa285.c
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- Lines: 82
- Date:
Thu Dec 17 09:05:42 1998
- Orig file:
v2.1.131/linux/arch/arm/mm/mm-ebsa285.c
- Orig date:
Tue Jul 21 00:15:30 1998
diff -u --recursive --new-file v2.1.131/linux/arch/arm/mm/mm-ebsa285.c linux/arch/arm/mm/mm-ebsa285.c
@@ -5,7 +5,6 @@
*
* Copyright (C) 1998 Russell King, Dave Gilbert.
*/
-#include <linux/config.h>
#include <linux/sched.h>
#include <linux/mm.h>
#include <linux/init.h>
@@ -14,46 +13,7 @@
#include <asm/page.h>
#include <asm/io.h>
#include <asm/proc/mm-init.h>
-
-/*
- * These two functions convert PCI bus addresses to virtual addresses
- * and back again.
- */
-unsigned long __virt_to_bus(unsigned long res)
-{
- if (res < PAGE_OFFSET || res >= 0xD0000000) {
- printk("__virt_to_bus: invalid address 0x%08lx\n", res);
-#ifdef CONFIG_DEBUG_ERRORS
- __backtrace();
-#endif
- } else
- res = (res - PAGE_OFFSET) + 0x10000000;
-
- return res;
-}
-
-unsigned long __bus_to_virt(unsigned long res)
-{
- if (res < 0x10000000 || res >= 0x20000000) {
- printk("__bus_to_virt: invalid address 0x%08lx\n", res);
-#ifdef CONFIG_DEBUG_ERRORS
- __backtrace();
-#endif
- } else
- res = (res - 0x10000000) + PAGE_OFFSET;
-
- return res;
-}
-
-/* Logical Physical
- * 0xfff00000 0x40000000 X-Bus
- * 0xffe00000 0x7c000000 PCI I/O space
- * 0xfe000000 0x42000000 CSR
- * 0xfd000000 0x78000000 Outbound write flush
- * 0xfc000000 0x79000000 PCI IACK/special space
- * 0xf9000000 0x7a000000 PCI Config type 1
- * 0xf8000000 0x7b000000 PCI Config type 0
- */
+#include <asm/dec21285.h>
/*
* This is to allow us to fiddle with the EEPROM
@@ -65,15 +25,15 @@
* until we're happy with them...
*/
#define MAPPING \
- { 0xd8000000, 0x41000000, 0x00400000, DOMAIN_USER, 1, 1 }, /* EEPROM */ \
- { 0xdc000000, 0x7c000000, 0x00100000, DOMAIN_USER, 1, 1 }, /* VGA */ \
- { 0xe0000000, 0x80000000, 0x10000000, DOMAIN_USER, 1, 1 }, /* VGA */ \
- { 0xf8000000, 0x7b000000, 0x01000000, DOMAIN_IO , 0, 1 }, /* Type 0 Config */ \
- { 0xf9000000, 0x7a000000, 0x01000000, DOMAIN_IO , 0, 1 }, /* Type 1 Config */ \
- { 0xfc000000, 0x79000000, 0x01000000, DOMAIN_IO , 0, 1 }, /* PCI IACK */ \
- { 0xfd000000, 0x78000000, 0x01000000, DOMAIN_IO , 0, 1 }, /* Outbound wflsh*/ \
- { 0xfe000000, 0x42000000, 0x01000000, DOMAIN_IO , 0, 1 }, /* CSR */ \
- { 0xffe00000, 0x7c000000, 0x00100000, DOMAIN_IO , 0, 1 }, /* PCI I/O */ \
- { 0xfff00000, 0x40000000, 0x00100000, DOMAIN_IO , 0, 1 }, /* X-Bus */
+ { 0xd8000000, DC21285_FLASH, 0x00400000, DOMAIN_USER, 1, 1 }, /* EEPROM */ \
+ { 0xdc000000, 0x7c000000, 0x00100000, DOMAIN_USER, 1, 1 }, /* VGA */ \
+ { 0xe0000000, DC21285_PCI_MEM, 0x18000000, DOMAIN_USER, 1, 1 }, /* VGA */ \
+ { 0xf8000000, DC21285_PCI_TYPE_0_CONFIG, 0x01000000, DOMAIN_IO , 0, 1 }, /* Type 0 Config */ \
+ { 0xf9000000, DC21285_PCI_TYPE_1_CONFIG, 0x01000000, DOMAIN_IO , 0, 1 }, /* Type 1 Config */ \
+ { PCI_IACK, DC21285_PCI_IACK, 0x01000000, DOMAIN_IO , 0, 1 }, /* PCI IACK */ \
+ { 0xfd000000, DC21285_OUTBOUND_WRITE_FLUSH, 0x01000000, DOMAIN_IO , 0, 1 }, /* Out wrflsh */ \
+ { 0xfe000000, DC21285_ARMCSR_BASE, 0x01000000, DOMAIN_IO , 0, 1 }, /* CSR */ \
+ { 0xffe00000, DC21285_PCI_IO, 0x00100000, DOMAIN_IO , 0, 1 }, /* PCI I/O */ \
+ { 0xfff00000, 0x40000000, 0x00100000, DOMAIN_IO , 0, 1 }, /* X-Bus */
#include "mm-armv.c"
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