patch-2.1.79 linux/include/asm-ppc/mmu.h

• Lines: 188
• Date: Mon Jan 12 15:18:13 1998
• Orig file: v2.1.78/linux/include/asm-ppc/mmu.h
• Orig date: Mon Aug 18 18:19:47 1997

diff -u --recursive --new-file v2.1.78/linux/include/asm-ppc/mmu.h linux/include/asm-ppc/mmu.h
@@ -6,23 +6,22 @@
 #define _PPC_MMU_H_
 
 /* Hardware Page Table Entry */
-typedef struct _PTE
-   {
-      unsigned long v:1;	/* Entry is valid */
-      unsigned long vsid:24;	/* Virtual segment identifier */
-      unsigned long h:1;	/* Hash algorithm indicator */
-      unsigned long api:6;	/* Abbreviated page index */
-      unsigned long rpn:20;	/* Real (physical) page number */
-      unsigned long    :3;	/* Unused */
-      unsigned long r:1;	/* Referenced */
-      unsigned long c:1;	/* Changed */
-      unsigned long w:1;	/* Write-thru cache mode */
-      unsigned long i:1;	/* Cache inhibited */
-      unsigned long m:1;	/* Memory coherence */
-      unsigned long g:1;	/* Guarded */
-      unsigned long    :1;	/* Unused */
-      unsigned long pp:2;	/* Page protection */
-   } PTE; 
+typedef struct _PTE {
+	unsigned long v:1;	/* Entry is valid */
+	unsigned long vsid:24;	/* Virtual segment identifier */
+	unsigned long h:1;	/* Hash algorithm indicator */
+	unsigned long api:6;	/* Abbreviated page index */
+	unsigned long rpn:20;	/* Real (physical) page number */
+	unsigned long    :3;	/* Unused */
+	unsigned long r:1;	/* Referenced */
+	unsigned long c:1;	/* Changed */
+	unsigned long w:1;	/* Write-thru cache mode */
+	unsigned long i:1;	/* Cache inhibited */
+	unsigned long m:1;	/* Memory coherence */
+	unsigned long g:1;	/* Guarded */
+	unsigned long  :1;	/* Unused */
+	unsigned long pp:2;	/* Page protection */
+} PTE; 
 
 /* Values for PP (assumes Ks=0, Kp=1) */
 #define PP_RWXX	0	/* Supervisor read/write, User none */
@@ -31,68 +30,61 @@
 #define PP_RXRX 3	/* Supervisor read,       User read */
 
 /* Segment Register */
-typedef struct _SEGREG
-{
-  unsigned long t:1;	/* Normal or I/O  type */
-  unsigned long ks:1;	/* Supervisor 'key' (normally 0) */
-  unsigned long kp:1;	/* User 'key' (normally 1) */
-  unsigned long n:1;	/* No-execute */
-  unsigned long :4;		/* Unused */
-  unsigned long vsid:24;	/* Virtual Segment Identifier */
+typedef struct _SEGREG {
+	unsigned long t:1;	/* Normal or I/O  type */
+	unsigned long ks:1;	/* Supervisor 'key' (normally 0) */
+	unsigned long kp:1;	/* User 'key' (normally 1) */
+	unsigned long n:1;	/* No-execute */
+	unsigned long :4;	/* Unused */
+	unsigned long vsid:24;	/* Virtual Segment Identifier */
 } SEGREG;
 
 /* Block Address Translation (BAT) Registers */
-typedef struct _P601_BATU
-{
-  unsigned long bepi:15;	/* Effective page index (virtual address) */
-  unsigned long :8;		/* unused */
-  unsigned long w:1;
-  unsigned long i:1;		/* Cache inhibit */
-  unsigned long m:1;		/* Memory coherence */
-  unsigned long vs:1;	/* Supervisor valid */
-  unsigned long vp:1;	/* User valid */
-  unsigned long pp:2;	/* Page access protections */
+typedef struct _P601_BATU {	/* Upper part of BAT for 601 processor */
+	unsigned long bepi:15;	/* Effective page index (virtual address) */
+	unsigned long :8;	/* unused */
+	unsigned long w:1;
+	unsigned long i:1;	/* Cache inhibit */
+	unsigned long m:1;	/* Memory coherence */
+	unsigned long ks:1;	/* Supervisor key (normally 0) */
+	unsigned long kp:1;	/* User key (normally 1) */
+	unsigned long pp:2;	/* Page access protections */
 } P601_BATU;
 
-typedef struct _BATU		/* Upper part of BAT */
-{
-  unsigned long bepi:15;	/* Effective page index (virtual address) */
-  unsigned long :4;		/* Unused */
-  unsigned long bl:11;	/* Block size mask */
-  unsigned long vs:1;	/* Supervisor valid */
-  unsigned long vp:1;	/* User valid */
+typedef struct _BATU {		/* Upper part of BAT (all except 601) */
+	unsigned long bepi:15;	/* Effective page index (virtual address) */
+	unsigned long :4;	/* Unused */
+	unsigned long bl:11;	/* Block size mask */
+	unsigned long vs:1;	/* Supervisor valid */
+	unsigned long vp:1;	/* User valid */
 } BATU;   
 
-typedef struct _P601_BATL
-{
-  unsigned long brpn:15;	/* Real page index (physical address) */
-  unsigned long :10;		/* Unused */
-  unsigned long v:1;		/* valid/invalid */
-  unsigned long bl:6;		/* Block size mask */
+typedef struct _P601_BATL {	/* Lower part of BAT for 601 processor */
+	unsigned long brpn:15;	/* Real page index (physical address) */
+	unsigned long :10;	/* Unused */
+	unsigned long v:1;	/* Valid bit */
+	unsigned long bl:6;	/* Block size mask */
 } P601_BATL;
 
-typedef struct _BATL		/* Lower part of BAT */
-{
-  unsigned long brpn:15;	/* Real page index (physical address) */
-  unsigned long :10;		/* Unused */
-  unsigned long w:1;	/* Write-thru cache */
-  unsigned long i:1;	/* Cache inhibit */
-  unsigned long m:1;	/* Memory coherence */
-  unsigned long g:1;	/* Guarded (MBZ) */
-  unsigned long :1;		/* Unused */
-  unsigned long pp:2;	/* Page access protections */
+typedef struct _BATL {		/* Lower part of BAT (all except 601) */
+	unsigned long brpn:15;	/* Real page index (physical address) */
+	unsigned long :10;	/* Unused */
+	unsigned long w:1;	/* Write-thru cache */
+	unsigned long i:1;	/* Cache inhibit */
+	unsigned long m:1;	/* Memory coherence */
+	unsigned long g:1;	/* Guarded (MBZ in IBAT) */
+	unsigned long :1;	/* Unused */
+	unsigned long pp:2;	/* Page access protections */
 } BATL;
 
-typedef struct _BAT
-{
-  BATU batu;		/* Upper register */
-  BATL batl;		/* Lower register */
+typedef struct _BAT {
+	BATU batu;		/* Upper register */
+	BATL batl;		/* Lower register */
 } BAT;
 
-typedef struct _P601_BAT
-{
-  P601_BATU batu;		/* Upper register */
-  P601_BATL batl;		/* Lower register */
+typedef struct _P601_BAT {
+	P601_BATU batu;		/* Upper register */
+	P601_BATL batl;		/* Lower register */
 } P601_BAT;
 
 /* Block size masks */
@@ -123,11 +115,10 @@
  * platforms, notably the 80x86 and 680x0.
  */
 
-typedef struct _pte
-   {
+typedef struct _pte {
    	unsigned long page_num:20;
-   	unsigned long flags:12;		/* Page flags (with some unused bits) */
-   } pte;
+   	unsigned long flags:12;		/* Page flags (some unused bits) */
+} pte;
 
 #define PD_SHIFT (10+12)		/* Page directory */
 #define PD_MASK  0x02FF
@@ -138,11 +129,10 @@
 
 /* MMU context */
 
-typedef struct _MMU_context
-   {
-      SEGREG	segs[16];	/* Segment registers */
-      pte	**pmap;		/* Two-level page-map structure */
-   } MMU_context;
+typedef struct _MMU_context {
+	SEGREG	segs[16];	/* Segment registers */
+	pte	**pmap;		/* Two-level page-map structure */
+} MMU_context;
 
 /* Used to set up SDR1 register */
 #define HASH_TABLE_SIZE_64K	0x00010000
@@ -167,5 +157,4 @@
 }
 
 extern void _tlbia(void);		/* invalidate all TLB entries */
-
 #endif