patch-2.3.99-pre6 linux/arch/i386/kernel/mtrr.c
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- Lines: 132
- Date:
Mon Apr 24 13:39:34 2000
- Orig file:
v2.3.99-pre5/linux/arch/i386/kernel/mtrr.c
- Orig date:
Tue Apr 11 15:09:12 2000
diff -u --recursive --new-file v2.3.99-pre5/linux/arch/i386/kernel/mtrr.c linux/arch/i386/kernel/mtrr.c
@@ -289,7 +289,7 @@
#define MTRRfix4K_F0000_MSR 0x26e
#define MTRRfix4K_F8000_MSR 0x26f
-#ifdef __SMP__
+#ifdef CONFIG_SMP
# define MTRR_CHANGE_MASK_FIXED 0x01
# define MTRR_CHANGE_MASK_VARIABLE 0x02
# define MTRR_CHANGE_MASK_DEFTYPE 0x04
@@ -302,7 +302,7 @@
#define LINE_SIZE 80
#define JIFFIE_TIMEOUT 100
-#ifdef __SMP__
+#ifdef CONFIG_SMP
# define set_mtrr(reg,base,size,type) set_mtrr_smp (reg, base, size, type)
#else
# define set_mtrr(reg,base,size,type) (*set_mtrr_up) (reg, base, size, type, \
@@ -767,7 +767,7 @@
unsigned long size, mtrr_type type,
int do_safe) = NULL;
-#ifdef __SMP__
+#ifdef CONFIG_SMP
struct mtrr_var_range
{
@@ -1015,7 +1015,7 @@
printk ("mtrr: probably your BIOS does not setup all CPUs\n");
} /* End Function mtrr_state_warn */
-#endif /* __SMP__ */
+#endif /* CONFIG_SMP */
static char *attrib_to_str (int x)
{
@@ -1110,7 +1110,7 @@
*
* Memory type region registers control the caching on newer Intel and
* non Intel processors. This function allows drivers to request an
- * MTRR is added. The details and hardware specifics of each processors
+ * MTRR is added. The details and hardware specifics of each processor's
* implementation are hidden from the caller, but nevertheless the
* caller should expect to need to provide a power of two size on an
* equivalent power of two boundary.
@@ -1125,13 +1125,13 @@
*
* The available types are
*
- * MTRR_TYPE_UNCACHEABLE - No caching
+ * %MTRR_TYPE_UNCACHEABLE - No caching
*
- * MTRR_TYPE_WRITEBACK - Write data back in bursts whenever
+ * %MTRR_TYPE_WRITEBACK - Write data back in bursts whenever
*
- * MTRR_TYPE_WRCOMB - Write data back soon but allow bursts
+ * %MTRR_TYPE_WRCOMB - Write data back soon but allow bursts
*
- * MTRR_TYPE_WRTHROUGH - Cache reads but not writes
+ * %MTRR_TYPE_WRTHROUGH - Cache reads but not writes
*
* BUGS: Needs a quiet flag for the cases where drivers do not mind
* failures and do not wish system log messages to be sent.
@@ -1608,7 +1608,7 @@
EXPORT_SYMBOL(mtrr_add);
EXPORT_SYMBOL(mtrr_del);
-#ifdef __SMP__
+#ifdef CONFIG_SMP
typedef struct
{
@@ -1663,7 +1663,7 @@
struct set_mtrr_context ctxt;
unsigned char ccr[7];
int ccrc[7] = { 0, 0, 0, 0, 0, 0, 0 };
-#ifdef __SMP__
+#ifdef CONFIG_SMP
int i;
#endif
@@ -1709,7 +1709,7 @@
setCx86 (CX86_CCR5, ccr[5]);
}
-#ifdef __SMP__
+#ifdef CONFIG_SMP
for(i=0; i<7; i++) ccr_state[i] = ccr[i];
for(i=0; i<8; i++)
cyrix_get_arr(i,
@@ -1782,7 +1782,7 @@
}
} /* End Function mtrr_setup */
-#ifdef __SMP__
+#ifdef CONFIG_SMP
static volatile unsigned long smp_changes_mask __initdata = 0;
static struct mtrr_state smp_mtrr_state __initdata = {0, 0};
@@ -1851,12 +1851,12 @@
break;
}
} /* End Function mtrr_init_secondary_cpu */
-#endif /* __SMP__ */
+#endif /* CONFIG_SMP */
int __init mtrr_init(void)
{
if ( !(boot_cpu_data.x86_capability & X86_FEATURE_MTRR) ) return 0;
-#ifdef __SMP__
+#ifdef CONFIG_SMP
switch (boot_cpu_data.x86_vendor)
{
case X86_VENDOR_AMD:
@@ -1866,7 +1866,7 @@
mtrr_state_warn (smp_changes_mask);
break;
}
-#else /* __SMP__ */
+#else /* CONFIG_SMP */
mtrr_setup ();
switch (boot_cpu_data.x86_vendor)
{
@@ -1877,7 +1877,7 @@
centaur_mcr_init ();
break;
}
-#endif /* !__SMP__ */
+#endif /* !CONFIG_SMP */
#ifdef CONFIG_PROC_FS
proc_root_mtrr = create_proc_entry ("mtrr", S_IWUSR | S_IRUGO, &proc_root);
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