patch-2.4.22 linux-2.4.22/arch/mips/baget/irq.c

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diff -urN linux-2.4.21/arch/mips/baget/irq.c linux-2.4.22/arch/mips/baget/irq.c
@@ -32,19 +32,19 @@
 /*
  * This table is a correspondence between IRQ numbers and CPU PILs
  */
- 
-static int irq_to_pil_map[BAGET_IRQ_NR] = { 
+
+static int irq_to_pil_map[BAGET_IRQ_NR] = {
 	7/*fixme: dma_err -1*/,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1, /* 0x00 - 0x0f */
 	-1,-1,-1,-1, 3,-1,-1,-1, 2, 2, 2,-1, 3,-1,-1,3/*fixme: lance*/, /* 0x10 - 0x1f */
         -1,-1,-1,-1,-1,-1, 5,-1,-1,-1,-1,-1, 7,-1,-1,-1, /* 0x20 - 0x2f */
 	-1, 3, 2/*fixme systimer:3*/, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3  /* 0x30 - 0x3f */
 };
 
-static inline int irq_to_pil(int irq_nr) 
+static inline int irq_to_pil(int irq_nr)
 {
 	int pil = -1;
 
-	if (irq_nr >= BAGET_IRQ_NR) 
+	if (irq_nr >= BAGET_IRQ_NR)
 		baget_printk("irq_to_pil: too large irq_nr = 0x%x\n", irq_nr);
 	else {
 		pil = irq_to_pil_map[irq_nr];
@@ -59,13 +59,13 @@
 
 static inline void modify_cp0_intmask(unsigned clr_mask, unsigned set_mask)
 {
-	unsigned long status = read_32bit_cp0_register(CP0_STATUS);
+	unsigned long status = read_c0_status();
 	status &= ~((clr_mask & 0xFF) << 8);
 	status |=   (set_mask & 0xFF) << 8;
-	write_32bit_cp0_register(CP0_STATUS, status);
+	write_c0_status(status);
 }
 
-/* 
+/*
  *  These two functions may be used for unconditional IRQ
  *  masking via their PIL protection.
  */
@@ -91,22 +91,22 @@
 
 static volatile unsigned int pil_in_use[BAGET_PIL_NR] = { 0, };
 
-void mask_irq_count(int irq_nr) 
+void mask_irq_count(int irq_nr)
 {
 	unsigned long flags;
 	int pil = irq_to_pil(irq_nr);
-	
+
 	save_and_cli(flags);
 	if (!--pil_in_use[pil])
 		mask_irq(irq_nr);
 	restore_flags(flags);
 }
 
-void unmask_irq_count(int irq_nr) 
+void unmask_irq_count(int irq_nr)
 {
 	unsigned long flags;
 	int pil = irq_to_pil(irq_nr);
-	
+
 	save_and_cli(flags);
 	if (!pil_in_use[pil]++)
 		unmask_irq(irq_nr);
@@ -148,7 +148,7 @@
 
 	for (i = 0 ; i < BAGET_IRQ_NR ; i++) {
 		action = irq_action[i];
-		if (!action) 
+		if (!action)
 			continue;
 		len += sprintf(buf+len, "%2d: %8d %c %s",
 			i, kstat.irqs[0][i],
@@ -181,7 +181,7 @@
 	irq_enter(cpu, irq);
 	kstat.irqs[cpu][irq]++;
 
-	mask_irq(irq);  
+	mask_irq(irq);
 	action = *(irq + irq_action);
 	if (action) {
 		if (!(action->flags & SA_INTERRUPT))
@@ -208,14 +208,14 @@
 /*
  *  What to do in case of 'no VIC register available' for current interrupt
  */
-static void vic_reg_error(unsigned long address, unsigned char active_pils) 
+static void vic_reg_error(unsigned long address, unsigned char active_pils)
 {
 	printk("\nNo VIC register found: reg=%08lx active_pils=%02x\n"
-	       "Current interrupt mask from CP0_CAUSE: %02x\n", 
-	       address, 0xff & active_pils, 
-	       0xff & (read_32bit_cp0_register(CP0_CAUSE)>>8));
+	       "Current interrupt mask from CP0_CAUSE: %02x\n",
+	       address, 0xff & active_pils,
+	       0xff & (read_c0_cause()>>8));
 	{ int i; for (i=0; i<10000; i++) udelay(1000); }
-}	
+}
 
 static char baget_fpu_irq = BAGET_FPU_IRQ;
 #define BAGET_INT_FPU {(unsigned long)&baget_fpu_irq, 1}
@@ -225,27 +225,27 @@
  */
 asmlinkage void baget_interrupt(struct pt_regs *regs)
 {
-	static struct baget_int_reg int_reg[BAGET_PIL_NR] = { 
+	static struct baget_int_reg int_reg[BAGET_PIL_NR] = {
 		BAGET_INT_NONE, BAGET_INT_NONE, BAGET_INT0_ACK, BAGET_INT1_ACK,
-		BAGET_INT_NONE, BAGET_INT_FPU,  BAGET_INT_NONE, BAGET_INT5_ACK 
+		BAGET_INT_NONE, BAGET_INT_FPU,  BAGET_INT_NONE, BAGET_INT5_ACK
 	};
 	unsigned char active_pils;
-	while ((active_pils = read_32bit_cp0_register(CP0_CAUSE)>>8)) {
+	while ((active_pils = read_c0_cause()>>8)) {
 		int pil;
 		struct baget_int_reg* reg;
 
                 for (pil = 0; pil < BAGET_PIL_NR; pil++) {
                         if (!(active_pils & (1<<pil))) continue;
- 			
+
 			reg = &int_reg[pil];
 
 			if (reg->address) {
                                 extern int try_read(unsigned long,int);
 				int irq  = try_read(reg->address, reg->size);
 
-				if (irq != -1) 
+				if (irq != -1)
 				      do_IRQ(BAGET_IRQ_MASK(irq), regs);
-				else 
+				else
 				      vic_reg_error(reg->address, active_pils);
 			} else {
 				printk("baget_interrupt: unknown interrupt "
@@ -297,9 +297,9 @@
 	return 0;
 }
 
-int request_irq(unsigned int irq, 
+int request_irq(unsigned int irq,
 		void (*handler)(int, void *, struct pt_regs *),
-		unsigned long irqflags, 
+		unsigned long irqflags,
 		const char * devname,
 		void *dev_id)
 {
@@ -310,12 +310,12 @@
 		return -EINVAL;
 	if (!handler)
 		return -EINVAL;
-	if (irq_to_pil_map[irq] < 0) 
+	if (irq_to_pil_map[irq] < 0)
 		return -EINVAL;
 
 	action = (struct irqaction *)
 			kmalloc(sizeof(struct irqaction), GFP_KERNEL);
-	if (!action) 
+	if (!action)
 		return -ENOMEM;
 
 	action->handler = handler;
@@ -332,13 +332,13 @@
 
 	return retval;
 }
-		
+
 void free_irq(unsigned int irq, void *dev_id)
 {
 	struct irqaction * action, **p;
 	unsigned long flags;
 
-	if (irq >= BAGET_IRQ_NR) 
+	if (irq >= BAGET_IRQ_NR)
 		printk("Trying to free IRQ%d\n",irq);
 
 	for (p = irq + irq_action; (action = *p) != NULL; p = &action->next) {
@@ -375,7 +375,7 @@
 	*(volatile char*) BAGET_WRERR_ACK = 0;
 }
 
-static struct irqaction irq0  = 
+static struct irqaction irq0  =
 { write_err_interrupt, SA_INTERRUPT, 0, "bus write error", NULL, NULL};
 
 void __init init_IRQ(void)
@@ -388,6 +388,6 @@
 	/* Enable interrupts for pils 2 and 3 (lines 0 and 1) */
 	modify_cp0_intmask(0, (1<<2)|(1<<3));
 
-	if (setup_baget_irq(0, &irq0) < 0) 
+	if (setup_baget_irq(0, &irq0) < 0)
 		printk("init_IRQ: unable to register write_err irq\n");
 }

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