patch-2.4.25 linux-2.4.25/include/asm-ia64/mca_asm.h
Next file: linux-2.4.25/include/asm-ia64/mmu_context.h
Previous file: linux-2.4.25/include/asm-ia64/mca.h
Back to the patch index
Back to the overall index
- Lines: 44
- Date:
2004-02-18 05:36:32.000000000 -0800
- Orig file:
linux-2.4.24/include/asm-ia64/mca_asm.h
- Orig date:
2003-06-13 07:51:38.000000000 -0700
diff -urN linux-2.4.24/include/asm-ia64/mca_asm.h linux-2.4.25/include/asm-ia64/mca_asm.h
@@ -212,7 +212,8 @@
* saved onto the new stack frame.
*
* +-----------------------+
- * |NDIRTY [BSP - BSPSTORE]|
+ * |NDIRTY_WORDS |
+ * | [BSP - BSPSTORE]|
* +-----------------------+
* | RNAT |
* +-----------------------+
@@ -230,7 +231,7 @@
#define rse_ifs_offset (rse_pfs_offset+0x08)
#define rse_bspstore_offset (rse_ifs_offset+0x08)
#define rse_rnat_offset (rse_bspstore_offset+0x08)
-#define rse_ndirty_offset (rse_rnat_offset+0x08)
+#define rse_ndirty_words_offset (rse_rnat_offset+0x08)
/*
* rse_switch_context
@@ -243,7 +244,8 @@
* 6. Save the old RNAT on the new stack frame
* 7. Write BSPSTORE with the new backing store pointer
* 8. Read and save the new BSP to calculate the #dirty registers
- * NOTE: Look at pages 11-10, 11-11 in PRM Vol 2
+ * NOTE: Look at section 6.11 in Intel IA-64 Architecture Software Developer's
+ * Manual, Volume 2, System Architecture.
*/
#define rse_switch_context(temp,p_stackframe,p_bspstore) \
;; \
@@ -280,12 +282,12 @@
#define rse_return_context(psr_mask_reg,temp,p_stackframe) \
;; \
alloc temp=ar.pfs,0,0,0,0; \
- add p_stackframe=rse_ndirty_offset,p_stackframe;; \
+ add p_stackframe=rse_ndirty_words_offset,p_stackframe;; \
ld8 temp=[p_stackframe];; \
shl temp=temp,16;; \
mov ar.rsc=temp;; \
loadrs;; \
- add p_stackframe=-rse_ndirty_offset+rse_bspstore_offset,p_stackframe;;\
+ add p_stackframe=-rse_ndirty_words_offset+rse_bspstore_offset,p_stackframe;;\
ld8 temp=[p_stackframe];; \
mov ar.bspstore=temp;; \
add p_stackframe=-rse_bspstore_offset+rse_rnat_offset,p_stackframe;;\
FUNET's LINUX-ADM group, linux-adm@nic.funet.fi
TCL-scripts by Sam Shen (who was at: slshen@lbl.gov)