patch-2.4.19 linux-2.4.19/arch/mips64/sgi-ip32/ip32-pci.c

• Lines: 58
• Date: Fri Aug 2 17:39:43 2002
• Orig file: linux-2.4.18/arch/mips64/sgi-ip32/ip32-pci.c
• Orig date: Sun Sep 9 10:43:02 2001

diff -urN linux-2.4.18/arch/mips64/sgi-ip32/ip32-pci.c linux-2.4.19/arch/mips64/sgi-ip32/ip32-pci.c
@@ -5,7 +5,6 @@
  *
  * Copyright (C) 2000, 2001 Keith M Wesolowski
  */
-#include <linux/config.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/pci.h>
@@ -152,7 +151,7 @@
 
 	if (request_irq (MACE_PCI_BRIDGE_IRQ, macepci_error, 0,
 			 "MACE PCI error", NULL))
-		panic ("PCI bridge can't get interrupt; can't happen.\n");
+		panic("PCI bridge can't get interrupt; can't happen.");
 
 	pci_scan_bus (0, &macepci_ops, NULL);
 
@@ -221,11 +220,30 @@
 		pci_write_config_byte (dev, PCI_CACHE_LINE_SIZE, 0x20);
 		pci_write_config_byte (dev, PCI_LATENCY_TIMER, 0x30);
 		pci_read_config_word (dev, PCI_COMMAND, &cmd);
-		cmd |= (PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_PARITY);
+		cmd |= (PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_SPECIAL | PCI_COMMAND_INVALIDATE | PCI_COMMAND_PARITY);
 		pci_write_config_word (dev, PCI_COMMAND, cmd);
 		pci_set_master (dev);
 	}
-
+        /*
+         * Fixup O2 PCI slot. Bad hack.
+         */
+/*        devtag = pci_make_tag(0, 0, 3, 0);
+
+        slot = macepci_conf_read(0, devtag, PCI_COMMAND_STATUS_REG);
+        slot |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE;
+        macepci_conf_write(0, devtag, PCI_COMMAND_STATUS_REG, slot);
+
+        slot = macepci_conf_read(0, devtag, PCI_MAPREG_START);
+        if (slot == 0xffffffe1)
+                macepci_conf_write(0, devtag, PCI_MAPREG_START, 0x00001000);
+
+        slot = macepci_conf_read(0, devtag, PCI_MAPREG_START + (2 << 2));
+        if ((slot & 0xffff0000) == 0) {
+                slot += 0x00010000;
+                macepci_conf_write(0, devtag, PCI_MAPREG_START + (2 << 2),
+                    0x00000000);
+        }
+ */
 #ifdef DEBUG_MACE_PCI
 	printk ("Triggering PCI bridge interrupt...\n");
 	mace_write_32 (MACEPCI_ERROR_FLAGS, MACEPCI_ERROR_INTERRUPT_TEST);
@@ -436,3 +454,7 @@
 			       & ~MACEPCI_ERROR_INTERRUPT_TEST);
 	}
 }
+unsigned __init int pcibios_assign_all_busses(void)
+{
+	return 0;
+}