patch-2.4.19 linux-2.4.19/arch/mips/mips-boards/generic/init.c
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- Lines: 151
- Date:
Fri Aug 2 17:39:43 2002
- Orig file:
linux-2.4.18/arch/mips/mips-boards/generic/init.c
- Orig date:
Fri Apr 13 20:26:07 2001
diff -urN linux-2.4.18/arch/mips/mips-boards/generic/init.c linux-2.4.19/arch/mips/mips-boards/generic/init.c
@@ -27,6 +27,8 @@
#include <asm/mips-boards/generic.h>
#include <asm/gt64120.h>
#include <asm/mips-boards/malta.h>
+#include <asm/mips-boards/msc01_pci.h>
+#include <asm/mips-boards/bonito64.h>
/* Environment variable */
typedef struct
@@ -36,27 +38,37 @@
} t_env_var;
int prom_argc;
-char **prom_argv, **prom_envp;
+int *_prom_argv, *_prom_envp;
+
+/*
+ * YAMON (32-bit PROM) pass arguments and environment as 32-bit pointer.
+ * This macro take care of sign extension, if running in 64-bit mode.
+ */
+#define prom_envp(index) ((char *)(((int *)(int)_prom_envp)[(index)]))
int init_debug = 0;
+unsigned int mips_revision_corid;
+
char *prom_getenv(char *envname)
{
- /*
+ /*
* Return a pointer to the given environment variable.
+ * In 64-bit mode: we're using 64-bit pointers, but all pointers
+ * in the PROM structures are only 32-bit, so we need some
+ * workarounds, if we are running in 64-bit mode.
*/
-
- t_env_var *env = (t_env_var *)prom_envp;
- int i;
+ int i, index=0;
i = strlen(envname);
- while(env->name) {
- if(strncmp(envname, env->name, i) == 0) {
- return(env->val);
+ while(prom_envp(index)) {
+ if(strncmp(envname, prom_envp(index), i) == 0) {
+ return(prom_envp(index+1));
}
- env++;
+ index += 2;
}
+
return(NULL);
}
@@ -109,26 +121,83 @@
int __init prom_init(int argc, char **argv, char **envp)
{
prom_argc = argc;
- prom_argv = argv;
- prom_envp = envp;
+ _prom_argv = (int *)argv;
+ _prom_envp = (int *)envp;
mips_display_message("LINUX");
- /*
- * Setup the North bridge to do Master byte-lane swapping when
- * running in bigendian.
- */
+#ifdef CONFIG_MIPS_SEAD
+ set_io_port_base(KSEG1);
+#else
+ mips_revision_corid = MIPS_REVISION_CORID;
+ switch(mips_revision_corid) {
+ case MIPS_REVISION_CORID_QED_RM5261:
+ case MIPS_REVISION_CORID_CORE_LV:
+ case MIPS_REVISION_CORID_CORE_FPGA:
+ /*
+ * Setup the North bridge to do Master byte-lane swapping
+ * when running in bigendian.
+ */
+#if defined(__MIPSEL__)
+ GT_WRITE(GT_PCI0_CMD_OFS, GT_PCI0_CMD_MBYTESWAP_BIT |
+ GT_PCI0_CMD_SBYTESWAP_BIT);
+#else
+ GT_WRITE(GT_PCI0_CMD_OFS, 0);
+#endif
+
+#if defined(CONFIG_MIPS_MALTA)
+ set_io_port_base(MALTA_GT_PORT_BASE);
+#else
+ set_io_port_base(KSEG1);
+#endif
+
+ break;
+ case MIPS_REVISION_CORID_BONITO64:
+ case MIPS_REVISION_CORID_CORE_20K:
+ /*
+ * Disable Bonito IOBC.
+ */
+ BONITO_PCIMEMBASECFG = BONITO_PCIMEMBASECFG &
+ ~(BONITO_PCIMEMBASECFG_MEMBASE0_CACHED |
+ BONITO_PCIMEMBASECFG_MEMBASE1_CACHED);
+
+ /*
+ * Setup the North bridge to do Master byte-lane swapping
+ * when running in bigendian.
+ */
#if defined(__MIPSEL__)
- GT_WRITE(GT_PCI0_CMD_OFS, GT_PCI0_CMD_MBYTESWAP_BIT |
- GT_PCI0_CMD_SBYTESWAP_BIT);
+ BONITO_BONGENCFG = BONITO_BONGENCFG &
+ ~(BONITO_BONGENCFG_MSTRBYTESWAP |
+ BONITO_BONGENCFG_BYTESWAP);
#else
- GT_WRITE(GT_PCI0_CMD_OFS, 0);
+ BONITO_BONGENCFG = BONITO_BONGENCFG |
+ BONITO_BONGENCFG_MSTRBYTESWAP |
+ BONITO_BONGENCFG_BYTESWAP;
#endif
#if defined(CONFIG_MIPS_MALTA)
- mips_io_port_base = MALTA_PORT_BASE;
+ set_io_port_base(MALTA_BONITO_PORT_BASE);
#else
- mips_io_port_base = KSEG1;
+ set_io_port_base(KSEG1);
+#endif
+ break;
+
+ case MIPS_REVISION_CORID_CORE_MSC:
+ set_io_port_base(MALTA_MSC_PORT_BASE);
+#if defined(__MIPSEL__)
+ MSC_WRITE(MSC01_PCI_SWAP, MSC01_PCI_SWAP_NOSWAP);
+#else
+ MSC_WRITE(MSC01_PCI_SWAP,
+ MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_IO_SHF |
+ MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_MEM_SHF |
+ MSC01_PCI_SWAP_BYTESWAP << MSC01_PCI_SWAP_BAR0_SHF);
+#endif
+ break;
+ default:
+ /* Unknown Core card */
+ mips_display_message("CC Error");
+ while(1); /* We die here... */
+ }
#endif
setup_prom_printf(0);
prom_printf("\nLINUX started...\n");
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TCL-scripts by Sam Shen (who was at: slshen@lbl.gov)