patch-2.4.22 linux-2.4.22/arch/mips/cobalt/pci.c

• Lines: 256
• Date: 2003-08-25 04:44:39.000000000 -0700
• Orig file: linux-2.4.21/arch/mips/cobalt/pci.c
• Orig date: 2002-11-28 15:53:09.000000000 -0800

diff -urN linux-2.4.21/arch/mips/cobalt/pci.c linux-2.4.22/arch/mips/cobalt/pci.c
@@ -6,8 +6,7 @@
  * for more details.
  *
  * Copyright (C) 1995, 1996, 1997 by Ralf Baechle
- * Copyright (C) 2001 by Liam Davies (ldavies@agile.tv)
- *
+ * Copyright (C) 2001, 2002, 2003 by Liam Davies (ldavies@agile.tv)
  */
 
 #include <linux/config.h>
@@ -16,9 +15,10 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 
-#include <asm/cobalt/cobalt.h>
 #include <asm/pci.h>
 #include <asm/io.h>
+#include <asm/gt64120/gt64120.h>
+#include <asm/cobalt/cobalt.h>
 
 #ifdef CONFIG_PCI
 
@@ -48,7 +48,7 @@
 {
 	unsigned short pci_cmd;
 	unsigned long ioaddr_base = 0x10108000; /* It's magic, ask Doug. */
-	unsigned long memaddr_base = 0x12000000;
+	unsigned long memaddr_base = 0x12001000;
 	int i;
 
 	/* Enable bits in COMMAND so driver can talk to it. */
@@ -60,6 +60,9 @@
 	pci_write_config_byte(dev, PCI_INTERRUPT_LINE, COBALT_QUBE_SLOT_IRQ);
 	dev->irq = COBALT_QUBE_SLOT_IRQ;
 
+	ioaddr_base += 0x2000 * PCI_FUNC(dev->devfn);
+	memaddr_base += 0x2000 * PCI_FUNC(dev->devfn);
+
 	/* Fixup base addresses, we only support I/O at the moment. */
 	for(i = 0; i <= 5; i++) {
 		unsigned int regaddr = (PCI_BASE_ADDRESS_0 + (i * 4));
@@ -125,27 +128,18 @@
 
 	/* Fixup the first tulip located at device PCICONF_ETH0 */
 	if (PCI_SLOT(dev->devfn) == COBALT_PCICONF_ETH0) {
-		/*
-		 * The IRQ of the first Tulip is different on Qube and RaQ
-		 */
-		if (cobalt_board_id == COBALT_BRD_ID_RAQ2) {
-			/* Setup the first Tulip on the RAQ */
-			pci_write_config_byte(dev, PCI_INTERRUPT_LINE,
-					      COBALT_RAQ_ETH0_IRQ);
-			dev->irq = COBALT_RAQ_ETH0_IRQ;
-		} else {
-			/* All Qube's route this the same way. */
-			pci_write_config_byte(dev, PCI_INTERRUPT_LINE,
-					      COBALT_QUBE_ETH_IRQ);
-			dev->irq = COBALT_QUBE_ETH_IRQ;
-		}
+		/* Setup the first Tulip */
+		pci_write_config_byte(dev, PCI_INTERRUPT_LINE,
+				      COBALT_ETH0_IRQ);
+		dev->irq = COBALT_ETH0_IRQ;
+
 		dev->resource[0].start = 0x100000;
 		dev->resource[0].end = 0x10007f;
-		if (dev->resource[1].start < 0x10000000) {
-			dev->resource[1].start = 0xe9ffec00;
-			dev->resource[1].end = 0xe9ffefff;
-			pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, 0xe9ffec00);
-		}
+
+		dev->resource[1].start = 0x12000000;
+		dev->resource[1].end = dev->resource[1].start + 0x3ff;
+		pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, dev->resource[1].start);
+
 	/* Fixup the second tulip located at device PCICONF_ETH1 */
 	} else if (PCI_SLOT(dev->devfn) == COBALT_PCICONF_ETH1) {
 
@@ -156,14 +150,18 @@
 
 		/* Give it it's IRQ. */
 		pci_write_config_byte(dev, PCI_INTERRUPT_LINE,
-                                      COBALT_RAQ_ETH1_IRQ);
-		dev->irq = COBALT_RAQ_ETH1_IRQ;
+                                      COBALT_ETH1_IRQ);
+		dev->irq = COBALT_ETH1_IRQ;
 
 		/* And finally, a usable I/O space allocation, right after what
 		 * the first Tulip uses.
 		 */
 		dev->resource[0].start = 0x101000;
 		dev->resource[0].end = 0x10107f;
+
+		dev->resource[1].start = 0x12000400;
+		dev->resource[1].end = dev->resource[1].start + 0x3ff;
+		pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, dev->resource[1].start);
 	}
 }
 
@@ -194,7 +192,10 @@
 		/* And finally, a usable I/O space allocation, right after what
 		 * the second Tulip uses.
 		 */
-		pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0x10102001);
+		dev->resource[0].start = 0x102000;
+		dev->resource[0].end = dev->resource[0].start + 0xff;
+		pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0x10102000);
+
 		pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, 0x00002000);
 		pci_write_config_dword(dev, PCI_BASE_ADDRESS_2, 0x00100000);
 	}
@@ -219,15 +220,15 @@
 	 */
 	pci_read_config_word(dev, PCI_REVISION_ID, &galileo_id);
 	galileo_id &= 0xff;     /* mask off class info */
-	if (galileo_id == 0x10) {
+	if (galileo_id >= 0x10) {
 		/* New Galileo, assumes PCI stop line to VIA is connected. */
-		*((volatile unsigned int *)0xb4000c04) = 0x00004020;
+		GALILEO_OUTL(0x4020, GT_PCI0_TOR_OFS);
 	} else if (galileo_id == 0x1 || galileo_id == 0x2) {
 		signed int timeo;
 		/* XXX WE MUST DO THIS ELSE GALILEO LOCKS UP! -DaveM */
-		timeo = *((volatile unsigned int *)0xb4000c04);
+		timeo = GALILEO_INL(GT_PCI0_TOR_OFS);
 		/* Old Galileo, assumes PCI STOP line to VIA is disconnected. */
-		*((volatile unsigned int *)0xb4000c04) = 0x0000ffff;
+		GALILEO_OUTL(0xffff, GT_PCI0_TOR_OFS);
 	}
 }
 
@@ -266,12 +267,9 @@
 	return -1;  /* NOT ok device number */
 }
 
-#define PCI_CFG_DATA	((volatile unsigned long *)0xb4000cfc)
-#define PCI_CFG_CTRL	((volatile unsigned long *)0xb4000cf8)
-
 #define PCI_CFG_SET(dev,where) \
-       ((*PCI_CFG_CTRL) = (0x80000000 | (PCI_SLOT ((dev)->devfn) << 11) | \
-                           (PCI_FUNC ((dev)->devfn) << 8) | (where)))
+       GALILEO_OUTL((0x80000000 | (((dev)->devfn) << 8) | \
+                           (where)), GT_PCI0_CFGADDR_OFS)
 
 static int qube_pci_read_config_dword (struct pci_dev *dev,
                                           int where,
@@ -284,7 +282,7 @@
 		return PCIBIOS_DEVICE_NOT_FOUND;
 	}
 	PCI_CFG_SET(dev, where);
-	*val = *PCI_CFG_DATA;
+	*val = GALILEO_INL(GT_PCI0_CFGDATA_OFS);
 	return PCIBIOS_SUCCESSFUL;
 }
 
@@ -299,7 +297,7 @@
 		return PCIBIOS_DEVICE_NOT_FOUND;
 	}
 	PCI_CFG_SET(dev, (where & ~0x3));
-	*val = *PCI_CFG_DATA >> ((where & 3) * 8);
+	*val = GALILEO_INL(GT_PCI0_CFGDATA_OFS) >> ((where & 3) * 8);
 	return PCIBIOS_SUCCESSFUL;
 }
 
@@ -312,7 +310,7 @@
 		return PCIBIOS_DEVICE_NOT_FOUND;
 	}
 	PCI_CFG_SET(dev, (where & ~0x3));
-	*val = *PCI_CFG_DATA >> ((where & 3) * 8);
+	*val = GALILEO_INL(GT_PCI0_CFGDATA_OFS) >> ((where & 3) * 8);
 	return PCIBIOS_SUCCESSFUL;
 }
 
@@ -325,7 +323,7 @@
 	if (pci_range_ck (dev))
 		return PCIBIOS_DEVICE_NOT_FOUND;
 	PCI_CFG_SET(dev, where);
-	*PCI_CFG_DATA = val;
+	GALILEO_OUTL(val, GT_PCI0_CFGDATA_OFS);
 	return PCIBIOS_SUCCESSFUL;
 }
 
@@ -341,10 +339,10 @@
 	if (pci_range_ck (dev))
 		return PCIBIOS_DEVICE_NOT_FOUND;
 	PCI_CFG_SET(dev, (where & ~0x3));
-	tmp = *PCI_CFG_DATA;
+	tmp = GALILEO_INL(GT_PCI0_CFGDATA_OFS);
 	tmp &= ~(0xffff << ((where & 0x3) * 8));
 	tmp |=  (val << ((where & 0x3) * 8));
-	*PCI_CFG_DATA = tmp;
+	GALILEO_OUTL(tmp, GT_PCI0_CFGDATA_OFS);
 	return PCIBIOS_SUCCESSFUL;
 }
 
@@ -358,10 +356,10 @@
 	if (pci_range_ck (dev))
 		return PCIBIOS_DEVICE_NOT_FOUND;
 	PCI_CFG_SET(dev, (where & ~0x3));
-	tmp = *PCI_CFG_DATA;
+	tmp = GALILEO_INL(GT_PCI0_CFGDATA_OFS);
 	tmp &= ~(0xff << ((where & 0x3) * 8));
 	tmp |=  (val << ((where & 0x3) * 8));
-	*PCI_CFG_DATA = tmp;
+	GALILEO_OUTL(tmp, GT_PCI0_CFGDATA_OFS);
 	return PCIBIOS_SUCCESSFUL;
 }
 
@@ -384,7 +382,7 @@
 	/* Read the cobalt id register out of the PCI config space */
 	dev.devfn = PCI_DEVFN(COBALT_PCICONF_VIA, 0);
 	PCI_CFG_SET(&dev, (VIA_COBALT_BRD_ID_REG & ~0x3));
-	cobalt_board_id = *PCI_CFG_DATA >> ((VIA_COBALT_BRD_ID_REG & 3) * 8);
+	cobalt_board_id = GALILEO_INL(GT_PCI0_CFGDATA_OFS) >> ((VIA_COBALT_BRD_ID_REG & 3) * 8);
 	cobalt_board_id = VIA_COBALT_BRD_REG_to_ID(cobalt_board_id);
 
 	printk("Cobalt Board ID: %d\n", cobalt_board_id);
@@ -398,37 +396,6 @@
 	pci_scan_bus(0, &qube_pci_ops, NULL);
 }
 
-char *pcibios_setup(char *str)
-{
-	return str;
-}
-
-int pcibios_enable_device(struct pci_dev *dev)
-{
-	u16 cmd, status;
-
-	pci_read_config_word(dev, PCI_COMMAND, &cmd);
-	pci_read_config_word(dev, PCI_STATUS, &status);
-	printk("PCI: Enabling device %s (%04x  %04x)\n", dev->slot_name, cmd, status);
-	/* We'll sort this out when we know it isn't enabled ;) */
-
-	return 0;
-}
-
-void pcibios_align_resource(void *data, struct resource *res,
-		unsigned long size, unsigned long align)
-{
-
-	panic("Uhhoh called pcibios_align_resource\n");
-}
-
-void pcibios_update_resource(struct pci_dev *dev, struct resource *root,
-		struct resource *res, int resource)
-{
-
-	panic("Uhhoh called pcibios_update_resource\n");
-}
-
 void __init pcibios_fixup_bus(struct pci_bus *bus)
 {
 	/* We don't have sub-busses to fixup here */