patch-2.4.22 linux-2.4.22/arch/ppc/platforms/prep_pci.c

• Lines: 137
• Date: 2003-08-25 04:44:40.000000000 -0700
• Orig file: linux-2.4.21/arch/ppc/platforms/prep_pci.c
• Orig date: 2003-06-13 07:51:31.000000000 -0700

diff -urN linux-2.4.21/arch/ppc/platforms/prep_pci.c linux-2.4.22/arch/ppc/platforms/prep_pci.c
@@ -43,7 +43,7 @@
 /* Used for Motorola to store system config register */
 static unsigned long	*ProcInfo;
 
-/* Tables for known hardware */   
+/* Tables for known hardware */
 
 /* Motorola PowerStackII - Utah */
 static char Utah_pci_IRQ_map[23] __prepdata =
@@ -155,7 +155,7 @@
    	15,	/* Line 3 */
    	15	/* Line 4 */
 };
-   
+
 /* Motorola Mesquite */
 static char Mesquite_pci_IRQ_map[23] __prepdata =
 {
@@ -271,7 +271,7 @@
 {
    	0,	/* This is a dummy structure */
 };
-   
+
 /* Motorola MVME16xx */
 static char Genesis_pci_IRQ_map[16] __prepdata =
 {
@@ -301,7 +301,7 @@
    	14,	/* Line 3 */
    	15	/* Line 4 */
 };
-   
+
 static char Genesis2_pci_IRQ_map[23] __prepdata =
 {
 	0,	/* Slot 0  - unused */
@@ -616,7 +616,7 @@
 #define ELCRM_INT5_LVL          0x20
 
 #define CFGPTR(dev) (0x80800000 | (1<<(dev>>3)) | ((dev&7)<<8) | offset)
-#define DEVNO(dev)  (dev>>3)                                  
+#define DEVNO(dev)  (dev>>3)
 
 #define cfg_read(val, addr, type, op)	*val = op((type)(addr))
 #define cfg_write(val, addr, type, op)	op((type *)(addr), (val))
@@ -740,7 +740,7 @@
 	OpenPIC_NumInitSenses = sizeof(prep_openpic_initsenses);
 
 	ppc_md.get_irq = openpic_get_irq;
-	
+
 	/* If raven is present on Motorola store the system config register
 	 * for later use.
 	 */
@@ -916,7 +916,7 @@
 	unsigned char *ibc_pirq = (unsigned char *)0x80800860;
 	unsigned char *ibc_pcicon = (unsigned char *)0x80800840;
 	int i;
-	
+
 	if ( _prep_type == _PREP_Motorola)
 	{
 		unsigned short irq_mode;
@@ -989,7 +989,7 @@
 		printk("No known machine pci routing!\n");
 		return;
 	}
-	
+
 	/* Set up mapping from slots */
 	for (i = 1;  i <= 4;  i++)
 		ibc_pirq[i-1] = Motherboard_routes[i];
@@ -1010,7 +1010,7 @@
 		 * Perform specific configuration for the Via Tech or
 		 * or Winbond PCI-ISA-Bridge part.
 		 */
-		if ((dev = pci_find_device(PCI_VENDOR_ID_VIA, 
+		if ((dev = pci_find_device(PCI_VENDOR_ID_VIA,
 					PCI_DEVICE_ID_VIA_82C586_1, dev))) {
 			/*
 			 * PPCBUG does not set the enable bits
@@ -1109,7 +1109,7 @@
 	 * the devfn of the bus bridge with secondary inputs, use those.
 	 * Otherwise, assume it's a PMC site and get the interrupt line
 	 * value from the interrupt routing table.
-	 */ 
+	 */
 	if (mot_info[mot_entry].secondary_bridge_devfn) {
 		pbus = dev->bus;
 
@@ -1183,7 +1183,7 @@
 				      (dev->resource[i].start > 0x10000000))  {
 				printk("Relocating PCI address %lx -> %lx\n",
 						dev->resource[i].start,
-						(dev->resource[i].start & 
+						(dev->resource[i].start &
 						 0x00FFFFFF)| 0x01000000);
 				dev->resource[i].start =
 					(dev->resource[i].start & 0x00FFFFFF)
@@ -1191,7 +1191,7 @@
 		                pci_write_config_dword(dev,
 						PCI_BASE_ADDRESS_0 + (i*0x4),
 						dev->resource[i].start);
-				dev->resource[i].end = 
+				dev->resource[i].end =
 					(dev->resource[i].end & 0x00FFFFFF)
 					| 0x01000000;
 		        }
@@ -1213,8 +1213,8 @@
 prep_pcibios_after_init(void)
 {
 	struct pci_dev *dev;
-	
-	/* If there is a WD 90C, reset the IO BAR to 0x0 (it started that 
+
+	/* If there is a WD 90C, reset the IO BAR to 0x0 (it started that
 	 * way, but the PCI layer relocated it because it thought 0x0 was
 	 * invalid for a BAR).
 	 * If you don't do this, the card's VGA base will be <IO BAR>+0xc0000
@@ -1263,7 +1263,7 @@
 	hose->ops = &prep_pci_ops;
 
 	printk("PReP architecture\n");
-#ifdef CONFIG_PREP_RESIDUAL	  
+#ifdef CONFIG_PREP_RESIDUAL
 	{
 		PPC_DEVICE *hostbridge;
 
@@ -1277,7 +1277,7 @@
 				3, 0);
 			if(pkt) {
 #define p pkt->L4_Pack.L4_Data.L4_PPCPack
-				setup_indirect_pci(hose, 
+				setup_indirect_pci(hose,
 					ld_le32((unsigned *) (p.PPCData)),
 					ld_le32((unsigned *) (p.PPCData+8)));
 #undef p