patch-2.4.22 linux-2.4.22/include/asm-ppc/uninorth.h

• Lines: 83
• Date: 2003-08-25 04:44:44.000000000 -0700
• Orig file: linux-2.4.21/include/asm-ppc/uninorth.h
• Orig date: 2003-06-13 07:51:38.000000000 -0700

diff -urN linux-2.4.21/include/asm-ppc/uninorth.h linux-2.4.22/include/asm-ppc/uninorth.h
@@ -9,7 +9,7 @@
 
 /*
  * Uni-N config space reg. definitions
- * 
+ *
  * (Little endian)
  */
 
@@ -32,13 +32,13 @@
 
 /* My understanding of UniNorth AGP as of UniNorth rev 1.0x,
  * revision 1.5 (x4 AGP) may need further changes.
- * 
+ *
  * AGP_BASE register contains the base address of the AGP aperture on
  * the AGP bus. It doesn't seem to be visible to the CPU as of UniNorth 1.x,
  * even if decoding of this address range is enabled in the address select
  * register. Apparently, the only supported bases are 256Mb multiples
  * (high 4 bits of that register).
- * 
+ *
  * GART_BASE register appear to contain the physical address of the GART
  * in system memory in the high address bits (page aligned), and the
  * GART size in the low order bits (number of GART pages)
@@ -47,39 +47,39 @@
  * This word contains, in little-endian format (!!!), the physical address
  * of the page in the high bits, and what appears to be an "enable" bit
  * in the LSB bit (0) that must be set to 1 when the entry is valid.
- * 
+ *
  * Obviously, the GART is not cache coherent and so any change to it
  * must be flushed to memory (or maybe just make the GART space non
  * cachable). AGP memory itself doens't seem to be cache coherent neither.
- * 
+ *
  * In order to invalidate the GART (which is probably necessary to inval
  * the bridge internal TLBs), the following sequence has to be written,
  * in order, to the GART_CTRL register:
- * 
+ *
  *   UNI_N_CFG_GART_ENABLE | UNI_N_CFG_GART_INVAL
  *   UNI_N_CFG_GART_ENABLE
  *   UNI_N_CFG_GART_ENABLE | UNI_N_CFG_GART_2xRESET
  *   UNI_N_CFG_GART_ENABLE
- *   
+ *
  * As far as AGP "features" are concerned, it looks like fast write may
  * not be supported but this has to be confirmed.
- * 
+ *
  * Turning on AGP seem to require a double invalidate operation, one before
  * setting the AGP command register, on after.
- * 
+ *
  * Turning off AGP seems to require the following sequence: first wait
  * for the AGP to be idle by reading the internal status register, then
  * write in that order to the GART_CTRL register:
- * 
+ *
  *   UNI_N_CFG_GART_ENABLE | UNI_N_CFG_GART_INVAL
  *   0
  *   UNI_N_CFG_GART_2xRESET
  *   0
  */
 
-/* 
+/*
  * Uni-N memory mapped reg. definitions
- * 
+ *
  * Those registers are Big-Endian !!
  *
  * Their meaning come from either Darwin and/or from experiments I made with
@@ -89,7 +89,7 @@
 
 /* Version of the UniNorth chip */
 #define UNI_N_VERSION			0x0000		/* Known versions: 3,7 and 8 */
- 
+
 /* This register is used to enable/disable various clocks */
 #define UNI_N_CLOCK_CNTL		0x0020
 #define UNI_N_CLOCK_CNTL_PCI		0x00000001	/* PCI2 clock control */